The present invention relates to integrated circuits which are protected from the environment. These circuits are inexpensive to fabricate and have improved performance and reliability.
Modern electronic circuits must be able to withstand a wide variety of environmental conditions such as moisture, ions, heat and abrasion. A significant amount of work has been reported directed toward various protective measures to minimize the exposure of such circuits to the above conditions and thereby increase their reliability and life.
Many prior art processes for protecting electronic circuits have involved sealing or encapsulating the circuits after they have been interconnected. For example, it is known in the art to use materials such as silicones, polyimides, epoxies, other organics, plastics, and the like to encapsulate such interconnected circuits. The above materials, however, are of only limited value since most are permeable to environmental moisture and ions.
Similarly, interconnected circuits have also been sealed within ceramic packages. This process has proven to be relatively effective in increasing device reliability and is currently used in select applications. The added size, weight and cost involved in this method, however, inhibits widespread application in the electronic industry.
The use of lightweight ceramic protective coatings on electronic devices has also been suggested. For instance, Haluska et al. in U.S. Pat. Nos. 4,756,977 and 4,749,631 describe the use of ceramic silica coatings derived from hydrogen silsesquioxane and silicate esters, respectively, as well as additional ceramic layers as hermetic barriers. The present inventor has discovered that when such coatings are applied specifically to integrated circuits at the wafer stage and even though the bond pads are subsequently opened by removing a portion of the coating, the resultant circuits remain sealed and exhibit increased reliability and life.
Sealing circuits at the wafer stage is also known in the art. For example, it is known in the art to coat fabricated integrated circuits with ceramic materials such as silica and/or silicon nitride by CVD techniques. These coatings are then etched back at the bond pads for the application of leads. The wafers coated in this manner, however, have inadequate reliability and life.
Similarly, Byrne in U.S. Pat. No. 5,136,364 teaches a method for sealing integrated circuits at the wafer stage. The process described therein comprises applying a first passivation coating which overlaps the edges of an aluminum bonding pad on an integrated circuit, applying a sequence of conductive layers comprising a barrier metal layer and a noble metal layer which overlay the aluminum bond pad and which has edges which overlap the first passivation layer, and then applying a second passivation layer which overlaps the edges of the sequence of conductive layers. This process, however, is complex and involves many deposition/etch steps.
The present inventor has now developed a simple process for the protection of integrated circuits which involves sealing the bond pads of integrated circuits with diffusion barrier layers and sealing the remainder of the device with passivation layers.